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Gardner定时同步环路参数设计及性能分析

付永明 朱江 琚瑛珏

通信学报2012,Vol.33Issue(6):191-198,8.
通信学报2012,Vol.33Issue(6):191-198,8.

Gardner定时同步环路参数设计及性能分析

Parameters design and performance analysis of the timing recovery loop based on Gardner timing detector

付永明 1朱江 1琚瑛珏1

作者信息

  • 1. 国防科学技术大学电子科学与工程学院,湖南长沙410073
  • 折叠

摘要

Abstract

In-depth research was carried out into parameters design in the feedback timing recovery loop based on Gardner timing error detector,according to the theory of digital phase-lock loop. MATLAB based simulation was performed for both first-order and second-order loop. Comprehensive analysis of the influence from loop order and noise- equivalent bandwidth on synchronization performance indicates the relationship between synchronization performance and noise-equivalent bandwidth,which provides a theoretic reference for timing recovery loop design.

关键词

定时同步/Gardner定时误差检测器/数字锁相环/环路参数/同步性能

Key words

timing synchronization/Gardner timing error detector, digital phase-lock loop/loop parameter/synchronization performance

分类

信息技术与安全科学

引用本文复制引用

付永明,朱江,琚瑛珏..Gardner定时同步环路参数设计及性能分析[J].通信学报,2012,33(6):191-198,8.

通信学报

OA北大核心CSCDCSTPCD

1000-436X

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