A fast combination calibration of foreground and background for pipelined ADCsOACSCDCSTPCD
A fast combination calibration of foreground and background for pipelined ADCs
This paper describes a fast digital calibration scheme for pipelined analog-to-digital converters (ADCs).The proposed method corrects the nonlinearity caused by finite opamp gain and capacitor mismatch in multiplying digital-to-analog converters (MDACs).The considered calibration technique takes the advantages of both foreground and background calibration schemes.In this combination calibration algorithm,a novel parallel background calibration with signal-sh…查看全部>>
Sun Kexu;He Lenian
Institute of VLSI Design,Zhejiang University,Hangzhou 310027,ChinaInstitute of VLSI Design,Zhejiang University,Hangzhou 310027,China
background calibrationcapacitor mismatch and gain calibrationdigital calibrationforeground calibrationpipelined analog-to-digital convertersignal-shifted correlation
background calibrationcapacitor mismatch and gain calibrationdigital calibrationforeground calibrationpipelined analog-to-digital convertersignal-shifted correlation
《半导体学报（英文版）》 2012 (6)
84-94,11
Project supported by the National Key Project,China (No.2008zx010200001).
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