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A fourth-order bandwidth-reconfigurable delta-sigma modulator for audio applications

Wang Junqian Yang Haifeng Wei Rui Xu Jun Ren Junyan

半导体学报(英文版)2012,Vol.33Issue(7):74-79,6.
半导体学报(英文版)2012,Vol.33Issue(7):74-79,6.DOI:10.1088/1674-4926/33/7/075002

A fourth-order bandwidth-reconfigurable delta-sigma modulator for audio applications

A fourth-order bandwidth-reconfigurable delta-sigma modulator for audio applications

Wang Junqian 1Yang Haifeng 1Wei Rui 1Xu Jun 1Ren Junyan1

作者信息

  • 1. State Key Laboratory of ASIC & System,Fudan University,Shanghai 201203,China
  • 折叠

摘要

Abstract

A single loop fourth order delta-sigma modulator is presented for audio applications.A reconfigurable mechanism is adopted for two bandwidth-based modes (8 k Hz/16 kHz).Manufactured in the SMIC 0.13μm CMOS mixed signal process,the chip consumes low power ( 153.6 μW) and occupies a core area of 0.98 × 0.46 mm2.The presented modulator achieves an 89.3 dB SNR and 90.2 dB dynamic range in 16 kHz mode,as well as a 90.2 dB SNR and 86 dB dynamic range in 8 kHz mode.The designed modulator shows a very competitive figure of merit among state-of-the-art low voltage modulators.

关键词

delta-sigma modulator/feedforward architecture/reconfiguration/switched capacitor/bootstrapped switch

Key words

delta-sigma modulator/feedforward architecture/reconfiguration/switched capacitor/bootstrapped switch

引用本文复制引用

Wang Junqian,Yang Haifeng,Wei Rui,Xu Jun,Ren Junyan..A fourth-order bandwidth-reconfigurable delta-sigma modulator for audio applications[J].半导体学报(英文版),2012,33(7):74-79,6.

基金项目

Project supported by the National High Technology Research and Development Program of China (No.2008AA010702) and the National Science & Technology Major Projects,China (No.2009ZX03007-002-02). (No.2008AA010702)

半导体学报(英文版)

OACSCDCSTPCD

1674-4926

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