半导体学报（英文版）2012，Vol.33Issue(10)：37-41,5.DOI:10.1088/1674-4926/33/10/104003
High voltage SOI LDMOS with a compound buried layer
High voltage SOI LDMOS with a compound buried layer
摘要
Abstract
An SOI LDMOS with a compound buried layer (CBL) was proposed.The CBL consists of an upper buried oxide layer (UBOX) with a Si window and two oxide steps,a polysilicon layer and a lower buried oxide layer (LBOX).In the blocking state,the electric field strengths in the UBOX and LBOX are increased from 88 V/μm of the buried oxide (BOX) in a conventional SOI (C-SOI) LDMOS to 163 V/μm and 460 V/μm by the holes located on the top interfaces of the UBOX and LBOX,respectively.Compared with the C-SOI LDMOS,the CBL LDMOS increases the breakdown voltage from 477 to 847 V,and lowers the maximal temperature by 6 K.关键词
SOI/ electric field/ specific on-resistance/ breakdown voltageKey words
SOI/ electric field/ specific on-resistance/ breakdown voltage引用本文复制引用
Luo Xiaorong,Hu Gangyi,Zhou Kun,Jiang Yongheng,Wang Pei,Wang Qi,Luo Yinchun,Zhang Bo,Li Zhaoji..High voltage SOI LDMOS with a compound buried layer[J].半导体学报（英文版）,2012,33(10):37-41,5.基金项目
Project supported by the National Natural Science Foundation of China (Nos.61176069,60976060) and the National Key Laboratory of Analogue Integrated Circuit,China (No.9140C090304110C0905). （Nos.61176069,60976060）
