电子器件2012，Vol.35Issue(5)：615-618,4.DOI:10.3969/j.issn.1005-9490.2012.05.028
基于FPGA的高速数据采集系统的设计与实现
Design of High Speed Data Acquisition System Based on FPGA
摘要
Abstract
This paper designed a high-speed data acquisition system consisting of AD, FPGA and DSP.The sampling accuracy is 12 bit, and sampling rate is 100 MSPS.This paper described two kinds of the front-end conditioning circuits and made a comparison between them, also described the clocking circuit of ADC, then introduced the design process of FPGA's programs based on verilog.After debugging and optimizing, the wave which reads in the DSP is stable and with a low ripple.关键词
数据采样系统/高速/前端调理电路/FPGAKey words
data acquisition system/ hight-speed/ front-end conditioning circuits/ FPGA分类
信息技术与安全科学引用本文复制引用
常高嘉,冯全源..基于FPGA的高速数据采集系统的设计与实现[J].电子器件,2012,35(5):615-618,4.基金项目
国家自然科学基金项目(60990320,60990323) （60990320,60990323）
国家自然科学基金面上项目(61271090) （61271090）
国家高技术研究发展计划(863计划)项目(2012AA012305) （863计划）
