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V波段CMOS注入锁相二分频器设计

杜泽保 杨浩 张海英

中国科学院研究生院学报2012,Vol.29Issue(5):681-685,5.
中国科学院研究生院学报2012,Vol.29Issue(5):681-685,5.

V波段CMOS注入锁相二分频器设计

Design of V-band CMOS injection-locked divide-by-2 frequency divider

杜泽保 1杨浩 1张海英1

作者信息

  • 1. 中国科学院微电子研究所射频集成电路研究室,北京100029
  • 折叠

摘要

Abstract

Based on the IBM 90 nm RF CMOS technique, an injection-locked millimeter-wave frequency divider with a locking range from 49. 8-55. 8 GHz was designed. Inductor, co-planner waveguide ( CPW) , and microstrip have been compared. Inductor with higher quality factor was used in Oscillator core to improve phase noise. CPW Was used in input match network to get broadband match, and it was also used in injection net to reduce layout area. Bias voltage of oscillator core and input transistor was optimized to improve the locking range.

关键词

CMOS/毫米波/注入锁相/共面波导

Key words

CMOS/ millimeter-wave/ injection-locked/ CPW

分类

信息技术与安全科学

引用本文复制引用

杜泽保,杨浩,张海英..V波段CMOS注入锁相二分频器设计[J].中国科学院研究生院学报,2012,29(5):681-685,5.

基金项目

国家国际科技合作专项(2009DFA12130)资助 (2009DFA12130)

中国科学院研究生院学报

OA北大核心CSCDCSTPCD

2095-6134

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