半导体学报（英文版）2012，Vol.33Issue(11)：90-94,5.DOI:10.1088/1674-4926/33/11/115006
A programmable gain amplifier with digitally assisted DC offset calibration for a direct-conversion WLAN receiver
A programmable gain amplifier with digitally assisted DC offset calibration for a direct-conversion WLAN receiver
Yao Xiaocheng 1Gong Zheng 1Shi Yin2
作者信息
- 1. Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
- 2. Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
- 折叠
摘要
Abstract
This paper presents a programmable gain amplifier (PGA) circuit with a digitally assisted DC offset cancellation (DCOC) scheme for a direct conversion WLAN receiver.Implemented in a standard 0.13-μm CMOS process,the PGA occupies 0.39 mm2 die area and dissipates 6.5 mW power from a 1.2 V power supply.By using a single loop single digital-to-analog converter (DAC) mixed signal DC offset cancellation topology,the minimum DCOC settling time achieved is as short as 1.6 μs with the PGA gain ranging from-8 to 54 dB in a 2 dB step.The DCOC loop utilizes a segmented DAC structure to lower the design complexity without sacrificing accuracy and a digital control algorithm to dynamically set the DCOC loop to fast or normal response mode,making the PGA circuit in compliance with the targeted WLAN specifications.关键词
direct conversion receiver/ digital assisted DC offset cancellation/ segmented current mode digitalto-analog converter/ settling timeKey words
direct conversion receiver/ digital assisted DC offset cancellation/ segmented current mode digitalto-analog converter/ settling time引用本文复制引用
Yao Xiaocheng,Gong Zheng,Shi Yin..A programmable gain amplifier with digitally assisted DC offset calibration for a direct-conversion WLAN receiver[J].半导体学报（英文版）,2012,33(11):90-94,5.
