计算机工程2013，Vol.39Issue(2)：260-264,269,6.DOI:10.3969/j.issn.1000-3428.2013.02.054
基于FPGA的脉冲宽度调制信号发生器
Pulse Width Modulation Signal Generator Based on FPGA
摘要
Abstract
Aiming at solving problems such as how to generate various Pulse Width Modulation(PWM) signals, a PWM signal generator based on Field Programmable Gate Array(FPGA) is proposed in this paper. It uses Verilog to customize system peripherals, and a NiosII soft-core processor is embedded in the FPGA chip, which enables to generate multi-channel PWM signal through collaborative work of hardware and software. Experimental results show that the output range of its frequency is 1 Hz~ 4 MHz, adjustable range of duty cycle is 1%~99%, and phase range between two signals is 1°~180°, achieving the desired effect.关键词
脉冲宽度调制/占空比/NiosII软核/压控放大器/相位累加器Key words
Pulse Width Modulation(PWM)/ duty ratio/ NiosII soft core/ voltage controlled amplifier/ phase accumulator分类
信息技术与安全科学引用本文复制引用
郝建卫..基于FPGA的脉冲宽度调制信号发生器[J].计算机工程,2013,39(2):260-264,269,6.基金项目
桂林电子科技大学信息科技学院与桂林亦元生现代生物技术有限公司合作基金资助项目(桂电W201111) （桂电W201111）
