计算机与现代化Issue(2)：108-112,116,6.DOI:10.3969/j.issn.1006-2475.2013.02.026
H.264/AVC中整数DCT变换量化模块的Verilog设计
Verilog Design of Integer DCT and Quantization Module in H.264/AVC
摘要
Abstract
The video compression standard H. 264/AVC uses 4×4 integer DCT and quantization methods, which avoid data mismatch and improve data accuracy, thus has high compression efficiency. This paper analyzes the algorithm of integer DCT and quantization in H.264. By transforming DCT into two quick butterfly computations, it reduces algorithm complexity and makes it easer to realize. The synthesis and simulation by QuartusⅡ show the correct results. The design is of 54.54MHz high clock frequency , low resource usage and low power dissipation.关键词
H.264/AVC/整数DCT/量化/Verilog HDLKey words
H.264/AVC/ integer DCT/ quantization/ Verilog HDL分类
信息技术与安全科学引用本文复制引用
沈劲桐,张卫..H.264/AVC中整数DCT变换量化模块的Verilog设计[J].计算机与现代化,2013,(2):108-112,116,6.基金项目
广东省科技计划省国际合作项目(2010B050900016) （2010B050900016）
