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A Phase Interpolator CDR with Low-Voltage CML Circuits

Li-Nan Li Wei-Peng Cai

电子科技学刊2012，Vol.10Issue(4)：314-318,5.

电子科技学刊2012，Vol.10Issue(4)：314-318,5.DOI:10.3969/j.issn.1674-862X.2012.04.006

Li-Nan Li ¹Wei-Peng Cai¹

作者信息

1. School of Electronic and Information Engineering,Beijing Jiaotong University, Beijing 100044,China
折叠

Clock and data recovery/current mode logic/low voltage/phase interpolator

Clock and data recovery/current mode logic/low voltage/phase interpolator

Li-Nan Li,Wei-Peng Cai..A Phase Interpolator CDR with Low-Voltage CML Circuits[J].电子科技学刊,2012,10(4):314-318,5.

This work was supported by the Fundamental Research Funds for the Central Universities under Grant No.2009JBM001. （）

ISSN：1674-862X

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