计算机与现代化Issue(3)：45-49,5.DOI:10.3969/j.issn.1006-2475.2013.03.012
一种AES算法的ASIC设计实现
An Implemention of AES Algorithm in ASIC
摘要
Abstract
In order to ensure the security of information systems, an ASIC implemention of AES based on Chartered 0. 35um CMOS process technology is shown. The Verilog HDL of AES algorithm is developed after the architecture design and module partition. The function simulation results demonstrate that the design works well. Finally, the physical design of the cipher chip is completed by Astro.关键词
信息系统/AES算法/功能仿真/物理设计Key words
information system/ AES algorithm/ function simulation/ physical design分类
信息技术与安全科学引用本文复制引用
史亚峰,赵毅强..一种AES算法的ASIC设计实现[J].计算机与现代化,2013,(3):45-49,5.基金项目
天津市自然科学基金资助项目(12JCZDJC20500) （12JCZDJC20500）
