| 注册
首页|期刊导航|半导体学报(英文版)|The architecture design of a 2mW 18-bit high speed weight voltage type DAC based on dual weight resistance chain

The architecture design of a 2mW 18-bit high speed weight voltage type DAC based on dual weight resistance chain

Chen Qixing Luo Qiyu

半导体学报(英文版)2013,Vol.34Issue(3):121-126,6.
半导体学报(英文版)2013,Vol.34Issue(3):121-126,6.DOI:10.1088/1674-4926/34/3/035010

The architecture design of a 2mW 18-bit high speed weight voltage type DAC based on dual weight resistance chain

The architecture design of a 2mW 18-bit high speed weight voltage type DAC based on dual weight resistance chain

Chen Qixing 1Luo Qiyu1

作者信息

  • 折叠

摘要

关键词

DAC/ weight resistance/ dual resistance/ resistance chain/ weight voltage/ weight current

Key words

DAC/ weight resistance/ dual resistance/ resistance chain/ weight voltage/ weight current

引用本文复制引用

Chen Qixing,Luo Qiyu..The architecture design of a 2mW 18-bit high speed weight voltage type DAC based on dual weight resistance chain[J].半导体学报(英文版),2013,34(3):121-126,6.

半导体学报(英文版)

OACSCDCSTPCDEI

1674-4926

访问量0
|
下载量0
段落导航相关论文