国防科技大学学报2013，Vol.35Issue(3)：176-180,5.
一种新型高精度低功耗守时芯片
A novel high-precision, low-power time-keeping chip
陈亮 1咸德勇 2刘思慧 1田丰 3欧钢1
作者信息
- 1. 国防科技大学电子科学与工程学院,湖南长沙410073
- 2. 北京环球信息应用开发中心,北京100094
- 3. 北京跟踪与通信技术研究所,北京100094
- 折叠
摘要
Abstract
In a positioning system based on calculating the distance by measuring the time delay,increasing the accuracy of the estimation of time delay is a key factor to improve the performance of navigation receivers.Generally,the off-the-shelf timekeeping chip cannot achieve the pedormance of high accuracy and low power consumption at the same time,which is especially required in portable and hand-hdd navigationreceivers.A novel architecture of the timekeeping chip was presented to solve that contradiction.In this architecture,the time is compensateddirectly according to the temperature.And two circuit operation states,the low-power operation and the high-power bursty process,work alternatelyin turn.The chip can achieve the time accuracy of 0.5ppm and the stand-by power consumption of 173μW,which can replace state-of-artcommercial RTCs to improve the performance of portable and hand-held navigation receivers.关键词
导航接收机/守时芯片/高精度/低功耗/待机模式Key words
navigation receiver/ timekeeping chip/ high-precision/ low-power/ stand-by state分类
信息技术与安全科学引用本文复制引用
陈亮,咸德勇,刘思慧,田丰,欧钢..一种新型高精度低功耗守时芯片[J].国防科技大学学报,2013,35(3):176-180,5.
