| 注册
首页|期刊导航|微型电脑应用|WEP安全组件的FPGA实现与优化

WEP安全组件的FPGA实现与优化

向伟 沈诗律 查智 耿文豹

微型电脑应用2013,Vol.30Issue(5):4-6,3.
微型电脑应用2013,Vol.30Issue(5):4-6,3.

WEP安全组件的FPGA实现与优化

Implementation and Optimization of WEP Encrypt and Decrypt Module Based on FPGA

向伟 1沈诗律 2查智 1耿文豹1

作者信息

  • 1. 中国船重工710所,宜昌,443000
  • 2. 西北工业大学,西安,710129
  • 折叠

摘要

Abstract

Differing from the demand of WEP module for high speed and low delay,a method to implement and optimize the WEP encrypt and decrypt module with VerilogHDL base on FPGA according to IEEE 802.11a Standard is proposed.The delay of the moduleis reduced by improving the architecture,as a result,the running speed meets 802.11a's highest rate of 54Mbps.Performance test verifies that this proposal is qualified for IEEE 802.11a's WEP encryption and decryption,and is practical for wireless communication applications.

关键词

WEP/FPGA/无线局域网/优化

Key words

WEP/FPG/Wireless LAN/Optimization

分类

信息技术与安全科学

引用本文复制引用

向伟,沈诗律,查智,耿文豹..WEP安全组件的FPGA实现与优化[J].微型电脑应用,2013,30(5):4-6,3.

基金项目

国家863高技术研究发展计划资助项目(NO.2012AA090901-05) (NO.2012AA090901-05)

微型电脑应用

OACSTPCD

1007-757X

访问量0
|
下载量0
段落导航相关论文