首页|期刊导航|半导体学报（英文版）|A 1-V 10-bit 80-MS/s 1.6-mW SAR ADC in 65-nm GP CMOS

A 1-V 10-bit 80-MS/s 1.6-mW SAR ADC in 65-nm GP CMOS

Ma Jun Guo Yawei Wu Yue Cheng Xu Zeng Xiaoyang

半导体学报（英文版）2013，Vol.34Issue(8)：162-171,10.

半导体学报（英文版）2013，Vol.34Issue(8)：162-171,10.DOI:10.1088/1674-4926/34/8/085014

A 1-V 10-bit 80-MS/s 1.6-mW SAR ADC in 65-nm GP CMOS

Ma Jun ¹Guo Yawei ¹Wu Yue ¹Cheng Xu ¹Zeng Xiaoyang¹

作者信息

1. State-Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China
折叠

摘要

关键词

successive approximation register/ analog-to-digital converter/ split structure/ leakage current

Key words

successive approximation register/ analog-to-digital converter/ split structure/ leakage current

引用本文复制引用

Ma Jun,Guo Yawei,Wu Yue,Cheng Xu,Zeng Xiaoyang..A 1-V 10-bit 80-MS/s 1.6-mW SAR ADC in 65-nm GP CMOS[J].半导体学报（英文版）,2013,34(8):162-171,10.

基金项目

Project supported by the PhD Programs Foundation of the Ministry of Education of China (No.20110071110014),and the State Key Program of National Natural Science of China (No.61234002). （No.20110071110014）

半导体学报（英文版）

OACSCDCSTPCDEI

ISSN：1674-4926

访问量0

下载量0

段落导航