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基于SystemVerilog的机载应答机验证技术的研究

田毅 李宏 马腾达 薛茜男

电子器件2013,Vol.36Issue(4):535-539,5.
电子器件2013,Vol.36Issue(4):535-539,5.DOI:10.3969/j.issn.1005-9490.2013.04.024

基于SystemVerilog的机载应答机验证技术的研究

Research of the Verification Technology for Airborne Transponder Based on SystemVerilog

田毅 1李宏 2马腾达 3薛茜男3

作者信息

  • 1. 中国民航大学,适航审定技术与管理研究中心,民用航空器适航与维修重点实验室,天津300300
  • 2. 民用飞机模拟飞行国家重点实验室,上海200232
  • 3. 中国民航大学航空自动化学院,天津300300
  • 折叠

摘要

Abstract

The airborne transponder has a major impact on the safety of aircraft.It should make a rigorous validation for the programmable logic device by real signal pulse width (including threshold value)simulation.Firstly,we studied standard normal distribution which is randomly generated pulse width and spacing,and then according to the practical application to improve normal distribution algorithm.Secondly,based on the assessment of electronic devices and IP core,SystemVerilog verification platformit is builed with validation incentive generated by improved algorithm.Finally,the efficient and accurate verification method is demonstrated in a certain type of transponder verification process.

关键词

硬件/验证/正态分布/SystemVerilog

Key words

hardware/verification/normal distribution/SystemVerilog

分类

航空航天

引用本文复制引用

田毅,李宏,马腾达,薛茜男..基于SystemVerilog的机载应答机验证技术的研究[J].电子器件,2013,36(4):535-539,5.

基金项目

国家自然科学基金项目(61179044) (61179044)

航空科学基金项目(20128067003) (20128067003)

中国民航大学科研启动基金项目(2012QD26X) (2012QD26X)

电子器件

OA北大核心CSTPCD

1005-9490

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