首页|期刊导航|电子科技学刊|Quick System-Level DDR3 Signal Integrity Simulation Research

Quick System-Level DDR3 Signal Integrity Simulation ResearchOA

Quick System-Level DDR3 Signal Integrity Simulation Research

Run-Jing Zhou;Yuan-Yuan Hao;Jin-Song Hu

College of Electronic Information Engineering, Inner Mongolia University, Hohhot 010021, ChinaCollege of Electronic Information Engineering, Inner Mongolia University, Hohhot 010021, ChinaPC Client Group, Intel Asia-Pacific R&D Ltd., Shanghai 200000, China

Double data rate synchronous dynamic random access memoryHspicePowerSIsignal integritysystem-level signal integrity simulation

Double data rate synchronous dynamic random access memoryHspicePowerSIsignal integritysystem-level signal integrity simulation

《电子科技学刊》 2013 (3)

高速数字系统的信号与电源完整性联合分析及优化设计

286-290,5

This work was supported by the National Natural Science Foundation of China under Grant No.61161001.

10.3969/j.issn.1674-862X.2013.03.009

评论

您当前未登录!去登录点击加载更多...