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An area-efficient 55 nm 10-bit 1-MS/s SAR ADC for battery voltage measurement

Chen Hongming Hao Yueguo Zhao Long Cheng Yuhua

半导体学报（英文版）2013，Vol.34Issue(9)：164-170,7.

半导体学报（英文版）2013，Vol.34Issue(9)：164-170,7.DOI:10.1088/1674-4926/34/9/095013

An area-efficient 55 nm 10-bit 1-MS/s SAR ADC for battery voltage measurement

Chen Hongming ¹Hao Yueguo ²Zhao Long ¹Cheng Yuhua²

作者信息

1. Shanghai Research Institute of Microelectronics(SHRIME), Peking University, Shanghai 201203, China
2. School of Information Science and Technology, Peking University, Beijing 100871, China
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摘要

关键词

successive approximation register/ analog-to-digital converter/ charge redistribution/ threshold inverter quantizer

Key words

successive approximation register/ analog-to-digital converter/ charge redistribution/ threshold inverter quantizer

引用本文复制引用

Chen Hongming,Hao Yueguo,Zhao Long,Cheng Yuhua..An area-efficient 55 nm 10-bit 1-MS/s SAR ADC for battery voltage measurement[J].半导体学报（英文版）,2013,34(9):164-170,7.

基金项目

Project supported by the National Natural Science Foundation of China (No.60736030),the Research Program of Science and Technology Commission of Shanghai (No.11110707100),and the National 02 Key Special Program of China (No.2009ZX02305-005). （No.60736030）

半导体学报（英文版）

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ISSN：1674-4926

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