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Power-aware transceiver design for half-duplex bidirectional chip-to-chip optical interconnects

Jamshid Sangirov Ikechi Augustine Ukaegbu Gulomjon Sangirov Tae-Woo Lee Hyo-Hoon Park

半导体学报（英文版）2013，Vol.34Issue(12)：60-65,6.

半导体学报（英文版）2013，Vol.34Issue(12)：60-65,6.DOI:10.1088/1674-4926/34/12/125001

Power-aware transceiver design for half-duplex bidirectional chip-to-chip optical interconnects

Jamshid Sangirov ¹Ikechi Augustine Ukaegbu ¹Gulomjon Sangirov ²Tae-Woo Lee ¹Hyo-Hoon Park¹

作者信息

1. Electrical Engineering Department, Korea Advanced Institute of Science and Technology(KAIST), 373-1 Guseong-dong, Yuseong-Gu, Daejeon, 305-732, Korea
2. Information and Communication Engineering Department, Harbin Engineering University, Harbin 150001, China
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摘要

关键词

optical transceiver/ power detector/ optical interconnect/ voltage regulator

Key words

optical transceiver/ power detector/ optical interconnect/ voltage regulator

引用本文复制引用

Jamshid Sangirov,Ikechi Augustine Ukaegbu,Gulomjon Sangirov,Tae-Woo Lee,Hyo-Hoon Park..Power-aware transceiver design for half-duplex bidirectional chip-to-chip optical interconnects[J].半导体学报（英文版）,2013,34(12):60-65,6.

基金项目

Project supported by the IT R&D Program of MKE/KEIT [No.10039230,Development of bidirectional 40 Gbps optical link module with low power in Green Data Centre for Smart Working Environment] and the Center for Integrated Smart Sensors funded by the Ministry of Education,Science and Technology as Global Frontier Project (No.CISS-2012366054191). （No.CISS-2012366054191）

半导体学报（英文版）

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ISSN：1674-4926

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