电子学报Issue(7)：1352-1357,6.DOI:10.3969/j.issn.0372-2112.2013.07.017
基于最小混乱度的三值可逆逻辑综合算法
Ternary Reversible Logic Synthesis Algorithm with Minimum Chaos Degree
摘要
Abstract
Ternary reversible logic synthesis is the extension and expansion of reversible logic synthesis .In order to simplify the reversible network and improve the generality of ternary reversible logic gate ,the effective value of controlling bits of the exist-ing ternary reversible controlled gates can be extended to any of 0 ,1 and 2 .And on the basis of that ,a ternary reversible logic syn-thesis algorithm with minimum chaos degree is proposed .The algorithm is used to compute the relative chaos degree and absolute chaos degree of each variable in truth table under ternary logic system ,according to the reversible function .As one reversible logic gate is selected ,the principle of minimal chaos degree in ternary reversible logic synthesis should be followed until the relative chaos degree and absolute chaos degree of each variable in truth table decrease to 0 ,which means the synthesis has been finished ,and the reversible network can be derived .The time complexity for the algorithm is O ( n2 × 3 n ) ,and its space complexity is O ( n × 3 n ) . The experimental results show that the average number of gates is less than the existing algorithms as known .关键词
三值可逆逻辑门/三值可逆逻辑综合/混乱度Key words
ternary reversible logic gate/ternary reversible logic synthesis/chaos degree分类
信息技术与安全科学引用本文复制引用
徐明强,管致锦,张海豹..基于最小混乱度的三值可逆逻辑综合算法[J].电子学报,2013,(7):1352-1357,6.基金项目
国家自然科学基金 （）
