电力系统自动化Issue(3)：78-82,88,6.DOI:10.7500/AEPS20130714012
基于FPGA的三电平空间矢量脉宽调制算法半实物实验方案
Hardware-in-the-loop Experiment Scheme for a Three-level Space-vector PWM Algorithm Based on FPGA
摘要
Abstract
A simplified three-level space vector pulse width modulation (SVPWM) algorithm for a three-level diode neutral point clamped (NPC) traction inverter in a motor system is discussed first based on the close relationship between the geometrical symmetry of sectors and the duty-ratio time of vectors.Then,a detailed design scheme based on the field programming gate array(FPGA)characterized by high speed,good compatibility and reusability is presented,which can relieve the digital processing unit of heavy trigonometric function computation through the simplified design of multiplier and divider units.Finally,the accuracy of the simplified three-level SVPWM algorithm and the feasibility of the design scheme based on FPGA are verified in the hardware-in-the-loop (HIL) experimental platform based on FPGA and dSPACE.关键词
三电平逆变器/空间矢量脉宽调制/半实物实验/现场可编程门阵列Key words
three-level inverter/space vector pulse width modulation (SVPWM)/hardware-in-the-loop (HIL) experiment/field programming gate array(FPGA)引用本文复制引用
吴瑕杰,王顺亮,宋文胜,方辉,冯晓云..基于FPGA的三电平空间矢量脉宽调制算法半实物实验方案[J].电力系统自动化,2014,(3):78-82,88,6.基金项目
国家科技支撑计划资助项目(2009BAG12A05) （2009BAG12A05）
国家自然科学基金资助项目(51207131,51277153) （51207131,51277153）
中央高校基本科研业务费专项资金资助项目(2682013ZT19,2682013CX017)@@@@This work is supported by National Key Technology Research and Development Program of China (No.2009BAG12A05),National Natural Science Foundation of China (No.51207131,No.51277153),and Fundamental Research Funds for the Central Universities(No.2682013ZT19,No.2682013CX017) （2682013ZT19,2682013CX017）
