| 注册
首页|期刊导航|计算机技术与发展|BCH编译码器在NAND Flash控制器中的应用研究

BCH编译码器在NAND Flash控制器中的应用研究

郭鹏 房亮 于沛玲

计算机技术与发展Issue(1):179-183,5.
计算机技术与发展Issue(1):179-183,5.DOI:10.3969/j.issn.1673-629X.2014.01.046

BCH编译码器在NAND Flash控制器中的应用研究

Application and Research of BCH Encoder/Decoder in NAND Flash Controller

郭鹏 1房亮 2于沛玲3

作者信息

  • 1. 中国科学院 光电研究院,北京 100094
  • 2. 中国科学院大学,北京 100190
  • 3. 中国科学院 空间应用工程与技术中心,北京100094
  • 折叠

摘要

Abstract

Based on the requirements of operating rate and correction capability for ECC of solid state memory for space application,a new architecture of parallel BCH encoder and decoder applied in NAND Flash Controller is presented. Design a new architecture of BCH decoder,and improve syndrome calculation algorithm. It utilizes encoder to calculate out syndrome polynomial first,and then uses decoder to calculate out the syndrome. Compared with other decoder which directly calculates out the syndrome,although it has a little decoding time increasing,could significantly reduce the usage of resources. This design combined with some other measures to save resources and improve speed,could better meet the demands of space application.

关键词

BCH码/并行/FFM/伴随多项式/伴随式/NAND Flash控制器

Key words

BCH code/parallel/Finite Field Multiplier/syndrome polynomial/syndrome/NAND Flash Controller

分类

信息技术与安全科学

引用本文复制引用

郭鹏,房亮,于沛玲..BCH编译码器在NAND Flash控制器中的应用研究[J].计算机技术与发展,2014,(1):179-183,5.

基金项目

总装备部预研计划项目(xxxx04013205) (xxxx04013205)

计算机技术与发展

OACSTPCD

1673-629X

访问量0
|
下载量0
段落导航相关论文