现代电子技术Issue(3)：137-140,4.
基于FPGA的数字日历设计
Design of digital calendar based on FPGA
摘要
Abstract
A design scheme of digital calendar based on FPGA is introduced. VHDL programming language is used to de-sign the digital calendar,which has functions of displaying the year,month,day,week,hour,minute,second,time adjust-ment and the Hourly chime. The input method of the scheme is in combination VHDL and block diagram. The design,compiling and simulation are completed under Quartus Ⅱ development environment. The designed file is accomplished and downloaded into FPGA chip EP1C3T144-3 to verify the results. The experiment results verify that the design scheme is workable,and can pro-vide references for the application of FPGA and the design of digital calendar.关键词
数字日历/VHDL/FPGA/Quartus ⅡKey words
digital calendar/VHDL/FPGA/Quartus Ⅱ分类
信息技术与安全科学引用本文复制引用
刘娟花,厉谨..基于FPGA的数字日历设计[J].现代电子技术,2014,(3):137-140,4.基金项目
西安工程大学大学生创业创新项目 （）
