摘要
Abstract
In order to produce m sequence with high performance and resource-saving,two algorithms based on FPGA,which respectively named as Logic Description and IP Core Transfer,are provided,and the implementation steps of the two algorithms are introduced. NEXYS3 developing platform from Xilinx Company is used to program and design. The feasibility of the two algo-rithm os tested. Combine with the emulation facility of ISE program,the autocorrelation,hardware occupancy rate and implemen-tation difficulty of the Matlab are analyzed. Finally the advantages of IP Core Transfer in m sequence are comprehended.关键词
m序列/FPGA/IP核/ISEKey words
m sequence/FPGA/IP Core/ISE分类
信息技术与安全科学
