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高电源电压抑制比基准电压源的设计

李承蓬 许维胜 王翠霞

现代电子技术Issue(6):132-135,4.
现代电子技术Issue(6):132-135,4.

高电源电压抑制比基准电压源的设计

Design of reference voltage source with high power supply rejection ratio

李承蓬 1许维胜 1王翠霞1

作者信息

  • 1. 同济大学 电气与信息工程学院,上海 201804
  • 折叠

摘要

Abstract

Based on modeling and analysis of the bandgap reference voltage source circuit,a bandgap reference voltage source with high power supply rejection ratio and low temperature coefficient was designed for high-voltage low-frequency inverter circuit. CMOS process of 1 μm and 700 V high-voltage is used in this circuit,which adopts first-order temperature compensa-tion at 5 V voltage. A cascode two-stage amplifier with high open-loop gain was designed to improve the power supply rejection ratio. The wide mirror current bias circuit is used to solve the problem that the output swing becomes smaller due to the cascode circuit. The normal output voltage of the reference voltage source is 2.394 V,its temperature coefficient is 8 ppm/℃,and its low-medium frequency voltage rejection ratio can reach -112 dB.

关键词

高电源电压抑制比/带隙基准/基准电压源/低温度系数/一阶补偿

Key words

high power supply rejection ratio/bandgap reference/reference voltage source/low temperature coefficient/first-order compensation

分类

信息技术与安全科学

引用本文复制引用

李承蓬,许维胜,王翠霞..高电源电压抑制比基准电压源的设计[J].现代电子技术,2014,(6):132-135,4.

现代电子技术

OA北大核心CSTPCD

1004-373X

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