现代电子技术Issue(7)：154-156,3.
基于Verilog HDL的FIR数字滤波器的优化设计与仿真
Optimization design and simulation of FIR digital filter based on Verilog HDL
摘要
Abstract
The realization of FIR digital filter based on Verilog HDL was studied and was improved on the basis of the dis-tributed algorithm. A 32-order constant coefficient FIR filter was designed. Verilog hardware description language was used for digital logic Design. The design was simulated and verified by taking Synopsys VCS as a simulation tool. It was synthesized with Design Compiler of Synopsys Company. The results show that the design can noy only ensure the running speed,but also save the area of the chip. It can be widely used in the design of digital integrated circuit.关键词
Verilog HDL/FIR滤波器/分布式算法/数字集成电路Key words
Verilog HDL/FIR filter/distributed algorithm/digital integrated circuit分类
信息技术与安全科学引用本文复制引用
李玉学,白忠臣,秦水介..基于Verilog HDL的FIR数字滤波器的优化设计与仿真[J].现代电子技术,2014,(7):154-156,3.基金项目
烤烟房无线监控系统研究与设计（黔科合GY字[2010]3056）；蛋白质芯片研发及工业化样机研制 （）
