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基于FPGA的高速串并/并串转换器设计

孙志雄 谢海霞

现代电子技术Issue(8):151-152,2.
现代电子技术Issue(8):151-152,2.

基于FPGA的高速串并/并串转换器设计

Design of high-speed serial parallel/parallel serial converter based on FPGA

孙志雄 1谢海霞1

作者信息

  • 1. 琼州学院 电子信息工程学院,海南 三亚 572022
  • 折叠

摘要

Abstract

In data transmission of digital communications,the majority of communication data is transmited in serial mode,but data storage and processing of most processors are required in parallel,so a serial to parallel or parallel to serial con-verter is needed to transform data serial transmission into parallel transmission,or transform data parallel transmission into serial transmission. The basic principles of serial parallel and parallel serial converters are introduced in this paper. The serial parallel and parallel serial converters was verified with VHDL language on Quartus II. The design of the serial parallel and parallel serial converter was implemented with The programming data files downloaded to FPGA chip EP1K30QC208-2. The simulation and ex-periment results indicate that this design scheme is feasible.

关键词

串并转换/并串转换/VHDL/FPGA

Key words

serial parallel conversion/parallel serial conversion/VHDL/FPGA

分类

信息技术与安全科学

引用本文复制引用

孙志雄,谢海霞..基于FPGA的高速串并/并串转换器设计[J].现代电子技术,2014,(8):151-152,2.

基金项目

海南省自然科学基金项目 ()

现代电子技术

OA北大核心CSTPCD

1004-373X

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