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3D图形硬件加速纹理映射单元设计

向前 周珍艮

冶金动力Issue(4):68-71,4.
冶金动力Issue(4):68-71,4.

3D图形硬件加速纹理映射单元设计

Design of Texture Mapping Unit for 3D Graphics Hardware Acceleration

向前 1周珍艮1

作者信息

  • 1. 铜陵学院电气工程学院,安徽铜陵244000
  • 折叠

摘要

Abstract

Development of the third-generation (3G) hand electronic products has great-ly broadened the application space of real-time graphics, while texture mapping is the most effective way to improve the sense of reality of graphics. Development of electronic technology has provided much more choice for the design of hardware acceleration chips. A texture mapping circuit was designed based on FPGA and using MIPmapping texture mapping algo-rithm. The circuit consisted of texture mapping address calculation, trilinear filtering and tex-ture memory. Comprehensive results showed its mapping speed can reach 41.145Mpixels/s and 329.16Mtexels/s for 24bits pixels.

关键词

电子产品设计/实时图形学/纹理映射/电路/算法

Key words

design of electronic product/real-time graphics/texture mapping/electric cir-cuit/algorithm

分类

信息技术与安全科学

引用本文复制引用

向前,周珍艮..3D图形硬件加速纹理映射单元设计[J].冶金动力,2014,(4):68-71,4.

基金项目

本课题为安徽高校省级自然科学研究项目(编号KJ2012Z415),铜陵学院自然科学研究项目(编号2006tlxykj004) (编号KJ2012Z415)

冶金动力

1006-6764

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