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A high speed low power low offset dynamic comparator used in SHA-less pipelined ADC

Liu Shubin Zhu Zhangming Yang Yintang Liu Lianxi

半导体学报(英文版)2014,Vol.35Issue(5):110-117,8.
半导体学报(英文版)2014,Vol.35Issue(5):110-117,8.DOI:10.1088/1674-4926/35/5/055008

A high speed low power low offset dynamic comparator used in SHA-less pipelined ADC

A high speed low power low offset dynamic comparator used in SHA-less pipelined ADC

Liu Shubin 1Zhu Zhangming 1Yang Yintang 1Liu Lianxi1

作者信息

  • 1. School of Microelectronics, Xidian University, Xi'an 710071, China
  • 折叠

摘要

关键词

SHA-less ADC/ dynamic comparator/ high speed/ low offset/ low power/ transmission gate

Key words

SHA-less ADC/ dynamic comparator/ high speed/ low offset/ low power/ transmission gate

引用本文复制引用

Liu Shubin,Zhu Zhangming,Yang Yintang,Liu Lianxi..A high speed low power low offset dynamic comparator used in SHA-less pipelined ADC[J].半导体学报(英文版),2014,35(5):110-117,8.

基金项目

Project supported by the National Natural Science Foundation of China (Nos.61234002,61006028),the National High-Tech Program of China (Nos.2012AA012302,2013AA014103),and the PhD Programs Foundation of Ministry of Education of China (No.20120203110017). (Nos.61234002,61006028)

半导体学报(英文版)

OACSCDCSTPCDEI

1674-4926

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