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Analog performance of double gate junctionless tunnel field effect transistor

M.W.Akram Bahniman Ghosh

半导体学报(英文版)2014,Vol.35Issue(7):37-41,5.
半导体学报(英文版)2014,Vol.35Issue(7):37-41,5.DOI:10.1088/1674-4926/35/7/074001

Analog performance of double gate junctionless tunnel field effect transistor

Analog performance of double gate junctionless tunnel field effect transistor

M.W.Akram 1Bahniman Ghosh1

作者信息

  • 1. Department of Electrical Engineering, Indian Institute of Technology Kanpur, Kanpur, Uttar Pradesh, 208016, India
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摘要

关键词

junctionless field effect transistor/tunnel field effect transistor/subthreshold slope

Key words

junctionless field effect transistor/tunnel field effect transistor/subthreshold slope

引用本文复制引用

M.W.Akram,Bahniman Ghosh..Analog performance of double gate junctionless tunnel field effect transistor[J].半导体学报(英文版),2014,35(7):37-41,5.

半导体学报(英文版)

OACSCDCSTPCDEI

1674-4926

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