半导体学报（英文版）2014，Vol.35Issue(7)：69-72,4.DOI:10.1088/1674-4926/35/7/074008
A novel symmetrical split-gate structure for 2-bit per cell flash memory
A novel symmetrical split-gate structure for 2-bit per cell flash memory
Fang Liang 1Kong Weiran 2Gu Jing 3Zhang Bo 2Zou Shichang2
作者信息
- 1. Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China
- 2. Huahong Grace Semiconductor Manufacturing Corporation, Shanghai 201203, China
- 3. University of Chinese Academy of Sciences, Beijing 100049, China
- 折叠
摘要
关键词
split-gate flash/2-bit per cell/self-aligned processKey words
split-gate flash/2-bit per cell/self-aligned process引用本文复制引用
Fang Liang,Kong Weiran,Gu Jing,Zhang Bo,Zou Shichang..A novel symmetrical split-gate structure for 2-bit per cell flash memory[J].半导体学报（英文版）,2014,35(7):69-72,4.
