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Combining a multi deposition multi annealing technique with a scavenging (Ti) to improve the high-k/metal gate stack performance for a gate-last process

Zhang ShuXiang Yang Hong Tang Bo Tang Zhaoyun Xu Yefeng Xu Jing Yan Jiang

半导体学报(英文版)2014,Vol.35Issue(10):182-186,5.
半导体学报(英文版)2014,Vol.35Issue(10):182-186,5.DOI:10.1088/1674-4926/35/10/106001

Combining a multi deposition multi annealing technique with a scavenging (Ti) to improve the high-k/metal gate stack performance for a gate-last process

Combining a multi deposition multi annealing technique with a scavenging (Ti) to improve the high-k/metal gate stack performance for a gate-last process

Zhang ShuXiang 1Yang Hong 1Tang Bo 1Tang Zhaoyun 1Xu Yefeng 1Xu Jing 1Yan Jiang1

作者信息

  • 1. Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China
  • 折叠

摘要

关键词

postdeposition annealing/ scavenging/ oxygen vacancy/ equivalent oxide thickness/ metal gate/high-k

Key words

postdeposition annealing/ scavenging/ oxygen vacancy/ equivalent oxide thickness/ metal gate/high-k

引用本文复制引用

Zhang ShuXiang,Yang Hong,Tang Bo,Tang Zhaoyun,Xu Yefeng,Xu Jing,Yan Jiang..Combining a multi deposition multi annealing technique with a scavenging (Ti) to improve the high-k/metal gate stack performance for a gate-last process[J].半导体学报(英文版),2014,35(10):182-186,5.

半导体学报(英文版)

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1674-4926

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