电子器件Issue(3)：431-434,4.DOI:10.3969/j.issn.1005-9490.2014.03.012
异步FIFO的设计分析
Design and Analysis of Asynchronous FIFO
王凯 1孙锋1
作者信息
- 1. 江南大学物联网工程学院，江苏 无锡214122
- 折叠
摘要
Abstract
Based on the principle of FIFO,in turn,the asynchronous FIFO's read/write control logic and empty/full judgment logic are discussed. Through breaking the traditional methods,an additional potential method is structed respectively by addeding the addotional bit to the read/write pointer to make a judge of the asynchronous FIFO's empty/full state faster and more accurately and a FIFO with forwarding function is designed. The test results show that the forwarding function of this FIFO is normal,and the speed of reading and writing can arrive at 165 MHz.关键词
异步FIFO/空满状态/附加位Key words
asynchronous FIFO/empty/full state/additional bit分类
信息技术与安全科学引用本文复制引用
王凯,孙锋..异步FIFO的设计分析[J].电子器件,2014,(3):431-434,4.
