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基于FPGA和DSP的数据采集与压缩系统∗

连猛 丑修建 李庆 崔丽杰

电子器件Issue(1):130-134,5.
电子器件Issue(1):130-134,5.DOI:10.3969/j.issn.1005-9490.2015.01.028

基于FPGA和DSP的数据采集与压缩系统∗

Data Acquisition and Compression System Based on FPGA and DSP

连猛 1丑修建 2李庆 1崔丽杰3

作者信息

  • 1. 中北大学仪器科学与动态测试教育部重点实验室,太原030051
  • 2. 中科院微电子研究所昆山分所,江苏 昆山215300
  • 3. 中科院微电子研究所昆山分所,江苏 昆山215300
  • 折叠

摘要

Abstract

The test of each module function which is applied to the body of the arrow,has a special technical index for the data acquisition,for examples,the requirement of reading the data of large capacity,the error rate is extreme-ly low. By referring to the existing data collection and compression technology designs the data acquisition and com-pression system which bases on FPGA and DSP. This system can realize the acquisition and processing of 12 analog signals,the sample rate is 324 ksample/s. To compress the data through using DSP chip,the compression removal rate can reach 75%. According to the data error problems,this system comes up with the design of data stream frame transmission. Finally,the tests have been carried out,the experiments show that systematic work is stable,the system solves the problem of the unity of the performance,power consumption and speed.

关键词

无损压缩/ARC算法/DSP/A/D转换

Key words

lossless compression/ARC algorithm/DSP/A/D conversion

分类

信息技术与安全科学

引用本文复制引用

连猛,丑修建,李庆,崔丽杰..基于FPGA和DSP的数据采集与压缩系统∗[J].电子器件,2015,(1):130-134,5.

基金项目

国家自然科学基金项目(613300216) (613300216)

电子器件

OA北大核心CSTPCD

1005-9490

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