电子器件Issue(1)：148-151,4.DOI:10.3969/j.issn.1005-9490.2015.01.032
基于FPGA的CPCI高速读数接口设计
Design of CPCI High Speed Reading Interface Based on FPGA
任勇峰 1彭巧君 2刘占峰1
作者信息
- 1. 中北大学仪器科学与动态测试教育部重点实验室，太原030051
- 2. 中北大学电子测试技术国家重点实验室，太原030051
- 折叠
摘要
Abstract
Aiming at issues of improving real-time and accurate receiving,processing high-speed data capability of it,the development and design of CPCI-bus interface and LVDS high-speed data interface based FPGA were studied. CPCI-bus interface and LVDS high-speed data interface,the combination of both improved the processing speed of the system,and satisfied the real time digital signal processing. After verification,the result showed that the reading interface was capable of real-time receiving and processing a large number of high-speed data accurately and it has very high reliability. It has been applied to practical engineering.关键词
读数接口/高速数据/CPCI总线/LVDS接口Key words
reading interface/high-speed data/CPCI-bus/LVDS interface分类
信息技术与安全科学引用本文复制引用
任勇峰,彭巧君,刘占峰..基于FPGA的CPCI高速读数接口设计[J].电子器件,2015,(1):148-151,4.
