电子器件Issue(1)：214-217,4.DOI:10.3969/j.issn.1005-9490.2015.01.045
一种DSP指令Cache的功耗优化策略∗
A Power Optimization Strategy of Directive Cache on DSP
摘要
Abstract
Power target has become much stricter for high-performance DSP design. An improved Cache power opti-mization strategy is put forward,directive Cache phased access is realized,and at the same time,the optimization of power cache and static leakage power is taken into account,which improves traditional optimization methods to raise processor performance. As a result, traditional NPOWP strategy has a significant affect on the processor performance. According to the results of different strategy simulations,it is applied to the design of a four-group con-nected instructions Cache,using the POWP strategy can reduce the average 75.4% of the instruction Cache power and the total processor power consumption 6.7% with the performance loss of only 0.77%.关键词
DSP/Cache功耗优化/NPOWP策略/静态漏流功耗/功率优化策略Key words
DSP/cache power optimization/NPOWP strategy/static leakage power/power optimization strategy分类
信息技术与安全科学引用本文复制引用
单悦尔,杨兵,于宗光,曹华锋..一种DSP指令Cache的功耗优化策略∗[J].电子器件,2015,(1):214-217,4.基金项目
江苏省333工程科研项目( BRA2011115) （ BRA2011115）
