电子器件Issue(3)：569-575,7.DOI:10.3969/j.issn.1005-9490.2015.03.019
基于EV10 AQ190的高速ADC接口设计∗
Design of Interface Circuit for High Speed ADC Based on EV10AQ190
摘要
Abstract
Based on the application of EV10AQ190, a design scheme for high speed ADC interface circuit is presented. Firstly,the technical characteristics of EV10AQ190 are briefly introduced. Secondly,FPGA CHIPSYNC and multi-channel calibration are emphasized as two key technological points. Finally,the results of experiments and hard-ware debugging are shown,which have verified that this ADC interface circuit can be capable of working stably at a frequency higher than 4 GHz. This solution has been utilized in the design of a wide-banded radar echo simulator.关键词
高速ADC/EV10AQ190/片同步/多路校正/FPGAKey words
high speed ADC/EV10AQ190/CHIPSYNC/multi-channel calibration/FPGA分类
信息技术与安全科学引用本文复制引用
肖汉波..基于EV10 AQ190的高速ADC接口设计∗[J].电子器件,2015,(3):569-575,7.基金项目
“十二五”国防预研项目 （）
