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基于SRAM和STT-RAM的混合指令Cache设计

皇甫晓妍 樊晓桠 黄小平

计算机工程与应用Issue(12):43-48,6.
计算机工程与应用Issue(12):43-48,6.DOI:10.3778/j.issn.1002-8331.1308-0155

基于SRAM和STT-RAM的混合指令Cache设计

Design of hybrid instruction Cache based on SRAM and STT-RAM

皇甫晓妍 1樊晓桠 1黄小平1

作者信息

  • 1. 西北工业大学 计算机学院,西安 710129
  • 折叠

摘要

Abstract

With the decrease of the grain size, the leakage power of traditional on-chip SRAM-based Cache increases expo-nentially, which hinders the increase of capacity of Cache on chip. As SRAM’s write speed is faster and STT-RAM is non-volatile, high density and very low leakage power, this paper designs a hybrid instruction Cache with SRAM and STT-RAM. The experimental results show that, compared with the SRAM-based instruction Cache, the hybrid instruction Cache increases capacity and significantly improves the hit rate without increasing the area.

关键词

自旋转移力矩随机存储器(STT-RAM)/指令Cache/混合Cache

Key words

Spin-Transfer Torque Random Access Memory(STT-RAM)/instruction Cache/hybrid Cache

分类

信息技术与安全科学

引用本文复制引用

皇甫晓妍,樊晓桠,黄小平..基于SRAM和STT-RAM的混合指令Cache设计[J].计算机工程与应用,2015,(12):43-48,6.

基金项目

国家自然科学基金(No.60773223,No.61003037,No.60736012,No.61173047);西北工业大学基础研究基金(No.JC20110224, No.JC201212)。 ()

计算机工程与应用

OA北大核心CSCDCSTPCD

1002-8331

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