计算机应用与软件Issue(11)：161-164,4.DOI:10.3969/j.issn.1000-386x.2014.11.040
基于 FPGA的改进误差扩散加网算法实现
REALISING FPGA-BASED IMPROVED ERROR DIFFUSION SCREENING ALGORITHM
赵莲清 1李树1
作者信息
- 1. 华北电力大学电气与电子工程学院 北京102206
- 折叠
摘要
Abstract
Traditional error diffusion algorithm has the problems of high memory occupancy and low screening speed.In this paper, by combining traditional algorithms and parallel optimisation algorithm, we propose an FPGA-based algorithm optimisation scheme and implement it, the resource occupancy rate is reduced greatly and the screening speed is improved as well.Furthermore, FS error diffusion algorithm is used as the example to analyse screening result.Analysis outcome shows that the optimised algorithm has good effect.Digital screening based on PLC no longer relies on mass storage, and the real-time screening will become possible.关键词
数字加网/FPGA/误差扩散/并行计算Key words
Digital screening/FPGA/Error diffusion/Parallel computing分类
信息技术与安全科学引用本文复制引用
赵莲清,李树..基于 FPGA的改进误差扩散加网算法实现[J].计算机应用与软件,2014,(11):161-164,4.
