计算机技术与发展Issue(5)：164-167,4.DOI:10.3969/j.issn.1673-629X.2015.05.039
一种宽温多协议时钟恢复电路的设计与实现
Design and Implementation of a Multi-mode Compatible CDR Circuit with Wide Operation Temperature Range
摘要
Abstract
CDR is the important module of high speed serial communication,and has direct effect on stability and bit error rate of commu-nication,and accessible to PVT. PCIE,RapidIO and other high speed serial communication protocols have strict definitions of data jitter property and jitter tolerance. Due to the complexity of CDR circuit with single protocol and speed ratio design in circuit application,test and integration,multi-protocol compatibility is the trend. A multi-protocol dual-path CDR integrated adaptive bandwidth PLL is present in this paper. Use digital control and phase interpolation methods and adjust the CDR bandwidth by configuring digital control bits to re-cover the clock and data correctly at different rates. The measured results show that jitter tolerance and frequency deviation is met the pro-tocol standard value from 1 to 3. 125 Gbps,and the bit error rate is less than 1E-12,which are all met the requirements of protocol FC (FC-PI-4)、PCIE(1.1) andRapidIO(1.3),theoperatingtemperaturerangeis-55~125℃.Atpresent,thecircuithasbeenusedina variety of high speed SerDes chip successfully,and integrated in a variety of SoC with high performance.关键词
时钟恢复电路/多协议/宽温/相位插值Key words
CDR/multi-protocol/wide temperature range/phase interpolation分类
信息技术与安全科学引用本文复制引用
邵刚,田泽,刘颖,刘敏侠,王晋..一种宽温多协议时钟恢复电路的设计与实现[J].计算机技术与发展,2015,(5):164-167,4.基金项目
“十二五”微电子预研(51308010601,51308010711) （51308010601,51308010711）
总装预研基金(9140A08010712HK6101) （9140A08010712HK6101）
