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基于FPGA的两种误码仪实现方法设计

刘浩 刘睿强 卢静

微型机与应用Issue(15):50-53,4.
微型机与应用Issue(15):50-53,4.

基于FPGA的两种误码仪实现方法设计

Two design methods of BERT based on FPGA

刘浩 1刘睿强 1卢静1

作者信息

  • 1. 重庆电子工程职业技术学院 应用电子学院,重庆 401331
  • 折叠

摘要

Abstract

A kind of BERT based EPF10KRC208-4 is provided in the paper with full use of programmability and rich resources of FPGA, and the complete functions of Quartus Ⅱ software development platform. It′s compact, easy to carry and has excellent accurate. The core part is developed by using a bit-by-bit comparison method and the shift register, and various bit error cases are compared in the simulation process. Finally, the analysis of the feasibility and the advantages and disadvantages of the two methods are provided according to the simulation results.

关键词

误码仪/FPGA/m 序列

Key words

BER/FPGA/m-sequence

分类

信息技术与安全科学

引用本文复制引用

刘浩,刘睿强,卢静..基于FPGA的两种误码仪实现方法设计[J].微型机与应用,2014,(15):50-53,4.

基金项目

重庆市教育科学“十二五”规划课题 ()

微型机与应用

2097-1788

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