现代电子技术Issue(10)：127-131,5.
循环汉明码编译器的设计与FPGA实现
Design and implementation of cyclic Hamming code encoder/decoder based on FPGA
王书省 1贺占权 1张少甫 1肖长春 1曹旸1
作者信息
- 1. 航天恒星科技有限公司，北京 100086
- 折叠
摘要
Abstract
Based on characteristics analysis of cyclic codes,a design scheme of cyclic Hamming code encoder/decoder is proposed. In the encoder/decoder,a division circuit is adopted for encoding,and a Meggitt decoder is adopted for decoding, which are easy to be applied to engineering implementment. The encoder/decoder,which is suited for (255,247) and its cyclic Hamming code of arbitrarily-truncated codes,and has higher code rate,was implemented on FPGA by means of Verilog HDL. Some optimization techniques in the design process are given. The simulation and testing results of the encoder/decoder are of-fered in this paper. The encoder/decoder can operate at high speed and has short decoding delay. Its max working clock frequen-cy is higher than 270 MHz in Virtex-5 chip. The encoder/decoder can be applied in digital communication systems that have defi-nite error number. Its BER can be reduced efficiently. The encoder/decoder has high practical value.关键词
循环码/汉明码/编译码器/FPGAKey words
cyclic code/Hamming code/encoder/decoder/FPGA分类
信息技术与安全科学引用本文复制引用
王书省,贺占权,张少甫,肖长春,曹旸..循环汉明码编译器的设计与FPGA实现[J].现代电子技术,2014,(10):127-131,5.
