半导体学报（英文版）2015，Vol.36Issue(8)：166-170,5.DOI:10.1088/1674-4926/36/8/085008
A 10-bit 120-MS/s pipelined ADC with improved switch and layout scaling strategy
A 10-bit 120-MS/s pipelined ADC with improved switch and layout scaling strategy
Zhou Jia 1Xu Lili 2Li Fule 1Wang Zhihua2
作者信息
- 1. Institute of Microelectronics, Tsinghua University, Beijing 100084, China
- 2. Tsinghua National Laboratory for Information Science and Technology, Tsinghua University, Beijing 100084, China
- 折叠
摘要
关键词
ADC/pipeline/body-effect/scaling down/parallelKey words
ADC/pipeline/body-effect/scaling down/parallel引用本文复制引用
Zhou Jia,Xu Lili,Li Fule,Wang Zhihua..A 10-bit 120-MS/s pipelined ADC with improved switch and layout scaling strategy[J].半导体学报（英文版）,2015,36(8):166-170,5.
