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基于FPGA的PCI Express 3.0高速DMA控制器设计

业青青 刁节涛 李楠 孙兆林

数字技术与应用Issue(8):3-7,5.
数字技术与应用Issue(8):3-7,5.

基于FPGA的PCI Express 3.0高速DMA控制器设计

业青青 1刁节涛 1李楠 1孙兆林1

作者信息

  • 1. 国防科学技术大学电子科学与工程学院 湖南长沙 410073
  • 折叠

摘要

Abstract

This paper introduces a new structure of DMA control er based on FPGA high speed transmission system with PCI Express 3.0, explains the logical design of DMA control er in detail and packages it into a standard FIFO structure, which can conveniently adopt to data acquisition or playback system. In order to verify the function and reliability of the design, a high-speed data acquisition and playback system based on PCI Express 3.0 X8 channel is built. The experiments show that the performance of the system has achieved the design specifications. The read/write speed of PCI Express 3.0 X8 channel DMA control er can reach 4,900MBytes/s when the size of the DMA is 16MB, which can meet the transmission needs of most of the high-speed data acquisition and playback systems.

关键词

PCI Express 3.0/高速采集回放/DMA/FPGA XILINX/数据传输

Key words

PCI Express 3.0/High speed acquisition and playback/DMA/FPGA, XILINX/data transmission

分类

信息技术与安全科学

引用本文复制引用

业青青,刁节涛,李楠,孙兆林..基于FPGA的PCI Express 3.0高速DMA控制器设计[J].数字技术与应用,2015,(8):3-7,5.

数字技术与应用

1007-9416

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