电测与仪表2015，Vol.52Issue(19)：11-17,7.
基于FPGA的全场景试验系统主时钟终端频率校准方法
Frequency correction of master clock terminal for whole-view test system based on FPGA
罗必露 1黄琦 1曹瓅月 1李坚 1井实1
作者信息
- 1. 电子科技大学能源科学与工程学院,成都 611731
- 折叠
摘要
Abstract
Aiming at the problem of low accuracy and insufficient stability of frequency of master clock terminal of whole-view test system, the paper presents a simple and effective method to correct frequency of OCXO ( oven con-trolled crystal oscillator) .Based on the principle of time system within FPGA( Field Programmable Gata Array) estab-lishment , the method measured the periodic deviation between OCXO and GPS through TDC ( Time to Digital Convert-er) , modified the value of period within FPGA, reaching the purpose of frequency correction.In order to reduce the impact of GPS signal jitter, the moving average filter algorithm is used to tame OCXO quickly.Simulation and experi-mental results show that the clock frequency accuracy is higher than the average 5 ×10 -10 , and the time accuracy is better than 1.8μ/h, after OCXO was tamed.关键词
时间数字转换器/FPGA/周期计数值/恒温晶振Key words
time to digital converter/Field Programmable Gata Array/oven controlled crystal oscillator/period counter分类
信息技术与安全科学引用本文复制引用
罗必露,黄琦,曹瓅月,李坚,井实..基于FPGA的全场景试验系统主时钟终端频率校准方法[J].电测与仪表,2015,52(19):11-17,7.
