空军预警学院学报Issue(1)：1-5,10,6.DOI:10.3969/j.issn.2095-5839.2013.01.001
弹载雷达信号处理SoC的设计与实现
Design of Missile-borne Radar Signal Processor SoC and Its Implementation
闵俊红 1苏涛 1郝珊珊1
作者信息
- 1. 西安电子科技大学雷达信号处理国家重点实验室，西安710071
- 折叠
摘要
Abstract
In order to meet the demand of system real-time, this paper designs a programmable SoC scheme of missile-borne radar signal processing system, where, by employing the SoC technique, the specific application modules for radar signal processing are integrated in a single chip as far as possible, thus improving its versatility. In the scheme, A/D sampling, DDC, PC, MTD, CFAR and other functional modules are integrated into a FPGA chip that has an embedded CPU hardcore, on which the testing and checking are performed. Meanwhile, by taking the performance improving strategy, the on-chip system performances are improved and the real-time demand for signal processing is met. Test analysis shows that this proposed chip has advantages of fast-processing capability, larger data storage capacity and less power consumption as well as super communication rate between modules in the chip.关键词
弹载雷达/可编程SoC/实时信号处理/FPGA/单芯片集成Key words
missile-borne radar/programmable SoC/real-time signal processing/FPGA/single-chip integration分类
信息技术与安全科学引用本文复制引用
闵俊红,苏涛,郝珊珊..弹载雷达信号处理SoC的设计与实现[J].空军预警学院学报,2013,(1):1-5,10,6.
