计算机技术与发展Issue(10)：7-12,6.DOI:10.3969/j.issn.1673-629X.2015.10.002
一种嵌入式系统模型的安全性分析验证方法
A Verification Method of Security Analysis for Embedded System Model
摘要
Abstract
Because the design cycle of embedded system model is shorter and shorter,the function is more and more complex,in the field of safety critical systems engineering,its security analysis and verification method is an important research hotspot in recent years. In view of this,put forward a method based on model driven architecture for system security analysis verification, which is oriented SysML/MARTE state machine,including that constructed the state machine metamodel which has SysML/MARTE extension semantics,and the GTS metamodel which is the semantic model of AltaRica,high safety modeling and analysis language,then established semantic mapping model transformation rules from the SysML/MARTE state machine model to the AltaRica model,and based on the platform of AMMA and the fault tree analysis tools XFTA to realize the model transformation of SysML/MARTE state machine and the framework for system security formal verification. Finally give security verification example about wheel brake system design model. Experimental results show that the proposed verification method of security analysis for embedded system design model is representative and executive.关键词
系统安全性分析/模型驱动/SysML/MARTE/XFTA/状态机模型/嵌入式系统模型Key words
system safety analysis/model driven/SysML/MARTE/XFTA/state machine model/embedded system model分类
信息技术与安全科学引用本文复制引用
石娇洁,胡军,刘雪,马金晶,黄志球,程桢..一种嵌入式系统模型的安全性分析验证方法[J].计算机技术与发展,2015,(10):7-12,6.基金项目
国家“973”重点基础研究发展计划项目(2014CB744903) （2014CB744903）
回国留学人员科研启动基金(2012) （2012）
611航空科研基金(2012) （2012）
南京航空航天大学青年科技创新基金(NS2014098) （NS2014098）
