现代电子技术Issue(16)：123-126,130,5.
高速面阵CCD KAI-01050功率驱动电路设计
Design of power driving circuit for high-speed area array CCD KAI-01050
曲洪丰 1刘栋斌 1李俊霖 1李哲2
作者信息
- 1. 中国科学院 长春光学精密机械与物理研究所，吉林 长春 130033
- 2. 中国科学院 研究生院，北京 100039
- 折叠
摘要
Abstract
Kodak’s KAI-01050 is a high-speed area array CCD whose frame rate is up to 120 frames per second. The de-sign of each power driving circuit in this CCD is introduced. The design difficulties include 40 MHz high-speed horizontal trans-fer,reset clock driver,three-levels echelon waveform vertical transfer clock V1 and high-voltage pulse electronic shutter driving circuits. High-speed driver ISL55110 and clamp circuit are used to drive high-speed horizontal transfer clock. Two high-speed MOSFET drivers are combined to drive three-level echelon waveform vertical transfer clock V1. The work mode that two high-speed complementary transistors switch on and off by turns are adopted to drive high-voltage pulse electronic shutter. Some im-portant circuits were simulated and verified in the PSpice software of Cadence. The experiment result shows that all the circuits can satisfy the requirement of power driving of the high-speed area array CCD KAI-01050.关键词
高速面阵CCD/功率驱动/三电平阶梯波形/高压脉冲/电子快门Key words
high-speed area array CCD/power driving/three-level echelon waveform/high-voltage pulse/electronic shut-ter分类
信息技术与安全科学引用本文复制引用
曲洪丰,刘栋斌,李俊霖,李哲..高速面阵CCD KAI-01050功率驱动电路设计[J].现代电子技术,2013,(16):123-126,130,5.
