太赫兹科学与电子信息学报Issue(2)：266-270,5.
视频目标检测跟踪程序在多核DSP上的并行实现
Realization of video target detecting and tracking procedures in parallel on multi-core DSP
摘要
Abstract
The communication and parallel-executing of the high-performance multi-core DSP is the key to the multi-core system design. The resource consumption is analyzed for each module of the video object tracking algorithm, and the idea of parallel computing is proposed for each part of the algorithm. The improved Binary-Mask algorithm is proposed to extract the background image; and the proposed auxiliary parallel architecture can realize the load-balance. The Inter Processor Communication(IPC) synchronization mechanisms are researched for DSP multi-core communication. The three-core parallel processing system is realized with pipelined parallel architecture. The communication delay time is tested by experiment, and target tracking program is divided into three DSP cores for parallel processing , which can achieve real-time requirement.关键词
TMS320C6474模块/目标识别/二值化掩膜/IPC机制/负载均衡/多核通信Key words
TMS320C6474/target recognition/Binary-Mask/Inter Processor Communication/load-balance/multi-core communication分类
信息技术与安全科学引用本文复制引用
陈钰,卿粼波,杨龙,何小海..视频目标检测跟踪程序在多核DSP上的并行实现[J].太赫兹科学与电子信息学报,2013,(2):266-270,5.基金项目
国家自然科学基金(61201388)；高等学校博士学科点专项科研基金资助项目(20110181120009) （61201388）
