中南民族大学学报（自然科学版）Issue(2)：73-76,4.
基于FP GA的正交匹配追踪算法的硬件实现
Hardware Implementation of OMP Algorithm Based on FPGA
熊承义 1董攀峰1
作者信息
- 1. 中南民族大学电子信息工程学院，武汉430074
- 折叠
摘要
Abstract
According to OMP algorithm in the CS reconstruction algorithm, an architecture of OMP algorithm has been proposed. The calculation delay is decreased by avoiding the root operation with modified Cholesky factorization. This design has been described by using RTL HDL, implemented with Altera’ s FPGA Cyclone III EP3C120F780C7. The functional simulation and timing simulation are carried out under the Modelsim. Simulation results verify the correctness of the design and indicate that the maximum operation frequency of the proposed design can reach as high as 31. 28MHz,using 9874 LEs.关键词
正交匹配追踪算法/现场可编程门阵列/修正的乔列斯基分解Key words
orthogonal matching pursuit algorithm/FPGA/modified Cholseky decomposition分类
信息技术与安全科学引用本文复制引用
熊承义,董攀峰..基于FP GA的正交匹配追踪算法的硬件实现[J].中南民族大学学报（自然科学版）,2013,(2):73-76,4.
